1. Field of the Invention
The present invention relates generally to computer and peripheral control devices and processes, and more particularly to such processes and devices capable of adaptively synthesizing a sequence of instructions to be executed by a computer system's central processing unit.
2. Discussion of the Technology and Prior Art
A computer system generally consists of a central processing unit (CPU), memory, and one or more of several peripheral devices, all connected together by means of a data bus, an address bus, and a control bus. The control bus is a collection of control signals used to synchronize the passing of data and addresses between the above listed elements of the computer. At least one of the peripheral devices must perform the necessary Input/Output functions of the computer. Other peripherals may be added to augment I/O capability, or to augment the CPU's processing capability.
The speed at which a computer system can perform data processing operations is determined by two factors: the number of instructions that must be executed in order to perform the desired data processing operation, and the speed at which the computer can execute these instructions. Many techniques have been used in the prior art to augment the speed at which computers can execute instructions. These include higher clock rates, pre-fetching instructions, cache memories, and multiprocessing among others, but they are not of concern in the present discussion. Several techniques are used in the prior art to reduce the number of instructions that must be executed and thereby speed up data processing operations, including the addition to the computer system of peripheral devices. These techniques provide foundation technology for the present invention and are enumerated herein.